CMP processes are widely used in the fabrication of integrated circuits. As an integrated circuit is built up layer by layer on the surface of a semiconductor wafer, CMP is used to planarize the topmost layer or layers to provide a level surface for subsequent fabrication steps. CMP is carried out by placing the wafer in a carrier that presses the wafer surface to be polished against a polishing pad attached to a platen disk. Both the platen disk and the wafer carrier are rotated while a slurry containing both abrasive particles and reactive chemicals is applied to the polishing pad. The slurry is transported to the wafer surface via the rotation of the porous polishing pad. The relative movement of the polishing pad and wafer surface coupled with the reactive chemicals in the slurry allows CMP to level the wafer surface by means of both physical and chemical forces.
CMP can be used at a number of points during the fabrication of an integrated circuit. For example, CMP may be used to planarize the inter-level dielectric layers that separate the various circuit layers in an integrated circuit. CMP is also commonly used in the formation of the copper lines that interconnect components of an integrated circuit.
Conventional CMP processes suffer from various drawbacks. First, uniformity, including within-wafer uniformity and wafer-to-wafer uniformity, can be difficult to control. For example, when planarizing a copper interconnect layer, the total (wafer-to-wafer plus within-wafer) variation of the sheet resistance (Rs) of the copper can be more than 15 percent even when the polishing time is adjusted using advanced process controls. Second, conventional CMP processes often fail to remove the desired amount of material from a wafer, which means the wafer needs to be reworked. Conventionally, more than 20 percent of the wafers need to be reworked. Third, many dummy wafers, typically more than 20 dummy wafers per day, may be needed for the conditioning of new polishing pads, and for the conditioning of polishing pads between lots (between which the CMP equipment is idled). Fourth, due to the significant wafer-to-wafer non-uniformity, the lifetimes of the polishing pads can vary significantly from pad to pad. All the above-discussed drawbacks mean that CMP processes can have low producibility and high cost of consumables (such as dummy wafers, polishing pads, and the like).
To solve the above-discussed problems, methods for improving CMP processes have been explored. For example, approaches involving controlling the temperature of the platen disk, wafer carrier, and slurry have been proposed. However, these methods were found to have limited results. New methods with improved results are thus needed.